Silicon-on-insulator (SOI) integrated circuits include islands of single-crystalline silicon on the surface of a substrate of an insulating material, such as sapphire or silicon oxide. Electrical components, such as MOS transistors, are formed in the islands and are electrically connected to form a desired electrical circuit. The MOS transistor includes source and drain regions in the island spaced by a channel region. A gate line of a conductive material, such as conductive polycrystalline silicon, extends across the channel region and is insulated therefrom by a layer of an insulating material, such as silicon oxide. The gate line extends not only across the top surface of the island, but also across the side edges of the island so that the gate line can be electrically connected to other MOS transistors.
Where the gate line extends across the side edges of the island, there is formed a parasitic transistor which adversely affects the characteristics of the MOS transistors, particularly in N-channel MOS transistors. As described in U.S. Pat. No. 3,890,632 to W.E. Ham et al., issued June 17, 1975, entitled STABILIZED SEMICONDUCTOR DEVICES AND METHOD OF MAKING SAME, one technique which has been used to eliminate the parasitic transistor is to dope the edges of the islands with a dopant of the same conductivity type as that of the island. In order to control the width of the doped region along the edges of the island, it would be desirable to have a self-aligned method of doping the edge. One self-aligned method which has been used is described in U.S. Pat. No. 4,393,572, issued July 19, 1983 to Policastro and Woo, entitled METHOD OF MAKING LOW LEAKAGE N-CHANNEL SOS TRANSISTORS UTILIZING POSITIVE PHOTORESIST MASKING TECHNIQUES. However, this method is relatively complex in that it used an additional photoresist step and back side exposure to achieve the self alignment of the patterns relative to the silicon island. Another self-aligned method is described in U.S. Pat. No. 4,070,211 to E. Harari, issued Jan. 24, 1978, entitled TECHNIQUE FOR THRESHOLD CONTROL OVER EDGES OF DEVICES ON SILICON-ON-SAPPHIRE. However, this method requires very thick masking layers to be deposited over the silicon islands. Therefore, it would be desirable to have a self-aligned method of doping the island edges which is less complex and does not require additional photoresist steps.